In recent years, semiconductor memory devices with increased density by arranging the memory cells in 3-dimensions have been proposed. This semiconductor device includes a plurality of pillar-shaped semiconductor pillars. Each semiconductor pillar includes a plurality of memory cells connected in series. Each semiconductor pillar is provided penetrating a stacked body that includes a plurality of electrode films stacked on a semiconductor substrate. The memory cells are configured at the positions where each semiconductor pillar intersects the plurality of electrode films. A plurality of bit lines and a plurality of source lines connected to each semiconductor pillar is provided in the semiconductor memory device. In the semiconductor memory device, it is important to increase the density of memory cells, as well as to reduce the pitch of the interconnection of the bit lines, and the like.